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==Description== | ==Description== | ||
This workstream will make the case for, and specify standardized Chiplet form factors to effectively deliver specialization and heterogeneity for HPC and AI | |||
==Scope== | |||
Compute and memory specialization can enable HPC to achieve the next 1000x of performance growth. However, economies of scale make it unaffordable for HPC alone to drive specialization for scientific applications. This motivates scientific computing practitioners to leverage ecosystems of supporting technologies and standards to allow the easy incorporation of customized hardware accelerators in the form of Chiplets into future systems. This workstream will make the case for and specify standardized Chiplet form factors to effectively deliver specialization and heterogeneity for HPC and AI. | Compute and memory specialization can enable HPC to achieve the next 1000x of performance growth. However, economies of scale make it unaffordable for HPC alone to drive specialization for scientific applications. This motivates scientific computing practitioners to leverage ecosystems of supporting technologies and standards to allow the easy incorporation of customized hardware accelerators in the form of Chiplets into future systems. This workstream will make the case for and specify standardized Chiplet form factors to effectively deliver specialization and heterogeneity for HPC and AI. | ||
Enhancing modularity for HPC and AI Chiplets can solve several product-development challenges that affect chipset-based designs, by developing open standards that ease the integration of chiplets from multiple vendors into future systems and thus also support the reusability of hardware IP for HPC and AI applications. In addition to specifying standards to support modularity such as form factors and protocols, this workstream will suggest technologies that support modularity and accelerate scientific workloads, thus delivering the next several generations of performance growth for scientific and engineering applications. This will enable this workstream to produce a specification containing standardized Chiplet form factors and supporting technologies to enable the seamless integration of chiplets and related hardware blocks into a System in Package (SiP). | Enhancing modularity for HPC and AI Chiplets can solve several product-development challenges that affect chipset-based designs, by developing open standards that ease the integration of chiplets from multiple vendors into future systems and thus also support the reusability of hardware IP for HPC and AI applications. In addition to specifying standards to support modularity such as form factors and protocols, this workstream will suggest technologies that support modularity and accelerate scientific workloads, thus delivering the next several generations of performance growth for scientific and engineering applications. This will enable this workstream to produce a specification containing standardized Chiplet form factors and supporting technologies to enable the seamless integration of chiplets and related hardware blocks into a System in Package (SiP). | ||
== | ==Get Involved== | ||
* [mailto:OCP-ODSA-HPC-AI-Modularity+subscribe@OCP-All.groups.io Subscribe to Group] | * [mailto:OCP-ODSA-HPC-AI-Modularity+subscribe@OCP-All.groups.io Subscribe to Group] | ||