Hardware Management/FMFM: Difference between revisions
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* [mailto:shen.zhou@intel.com Shen Zhou] | * [mailto:shen.zhou@intel.com Shen Zhou] | ||
* [mailto: | * [mailto:drewwalton@microsoft.com Drew Walton] | ||
* [mailto:yogesh.varmau@intel.com Yogesh Varma] | * [mailto:yogesh.varmau@intel.com Yogesh Varma] | ||
Revision as of 21:36, 18 July 2024
Welcome to the OCP Fleetscale Memory Fault Management (FMFM) WIKI
Fleetscale Memory Fault Management is a Worksteam within the Hardware Management Project.
Leadership
Scope
The FMFM is a workstream about standardization of Fleetscale Memory Fault Management
- Proposed topics:
- Standardize vendor agnostic architecture for memory error handling
- Modularization of inputs from different hardware vendors
- APIs and connections between different modules from different vendors.
- Define the output of each module (failure cause, health information, RAS actions, etc.)
- Standardize memory error telemetry
- Format content for better fleet scale RAS management
- Troubleshooting, FRU replacement policies, etc.
- Coordinate with the broader OCP group to make sure there is a path for this general architecture
Get Involved
Subproject Meets Biweekly on Tuesday from 7:10-8 am PST
- Link to the FMFM Calendar
- Link to the Meeting
- You can also dial in using your phone : United States: +1 (646) 749-3112 Access Code: 454-746-381
Mailing List
Participate in the discussion:
- FMFM on OCP Groups.io: FMFM Group Link
- Subscribe to mailing list
- Post to mailing list
Documents
- Link to Fleetscale Memory Fault Management (FMFM) Workstream Proposal
- Link to Fleetscale Memory Fault Management (FMFM) Framework Requirements